91高清视频,天天操人人,日日干日日色,中文娱乐av,99精品欧美一区二区蜜桃免费,午夜乱蜜桃久久久乱,麻豆国产在线播放

工作職責(zé)：
1. Full layout design for standard cell/IO/SRAM IPs in advanced process nodes
2. Work on the physical verification (DRC/LVS/Antenna ...)
3. Work on test chip layout design and verification
4. Close cooperation with designers on PPA optimization
任職要求：
1. At least BS Degree of Microelectronics or Physics.
2. Excellent graduate or at least 1 years related working experience
3. Familiar with layout design and verification tools (Virtuoso, Laker, Calibre)
4. Familiar with design rule and layout effect in advanced process.
5. Excellent skills of communication and teamwork are also expected.
6. Programming experience (Perl/tcl skill) will be a plus.
7. Experience in advanced process (n16 and beyond) will be a plus.